Computer architecture exam questions and answers. Computer Architecture Organization questions and answers 2019-02-12

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Use Our Computer Architecture Exam Questions and Solutions

computer architecture exam questions and answers

What is the principle of locality? Hence, at the next active edge of the clock, the flip-flops that constitute R4 will load the data present at their inputs. Caching is a technology based on the memory subsystem of your computer. Computer technology quiz has 29 multiple choice questions. Simplex mode Ans: B 127. Ans: B 102 A page fault A Occurs when there is an error in a specific page. Its purpose is to unburden the application software programmer from the often complex details of the particular computer being used, including such accessories as communications devices, printers, device readers, displays and keyboards, and also to partition the computer's resources such as memory and processor time in a safe and stable manner. What are branch prediction schemes? The address space is divided into two parts index field and tag field.

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Computer Science Study Material for Gate

computer architecture exam questions and answers

Virtual memory is — 1 an extremely large main memory 2 an extremely large secondary memory 3 an illusion of an extremely large memory 4 a type of memory used in super computers 5 None of these Answers: 3 188. The memory read operation requires three steps, which can be described by the signals being activated as follows: 1. You can use contents in this blog only for personal use. This job of the programmer is known as instruction sequencing. Pauls Engineering Collage Pauls Nagar, Villupuram Tamilnadu, India. What is the purpose of defining a pin architecture? Single bus structure In computer architecture, a bus is a subsystem that transfers data between components inside a computer, or between computers.

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Use Our Computer Architecture Exam Questions and Solutions

computer architecture exam questions and answers

Memory unit accessed by content is called A Read only memory B Programmable Memory C Virtual Memory D Associative Memory Ans: D 44. Relative mode - The effective address is determined by the Index mode using the program counter in place of the general-purpose register Ri. Data Hazards: It arise when an instruction depends on the results of previous instruction in a way that is exposed by the ovelapping of instructions in the pipeline. Performance is increased when execution time is increased C. A memory buffer used to accommodate a speed differential is called a stack pointer b cache c accumulator d disk buffer Answer:b.

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Computer Architecture and Organization Multiple Choice Questions Answers

computer architecture exam questions and answers

All operations and data transfers within the processor take place within time periods defined by the processor clock. Memory Unit The function of the memory unit is to store programs and data. Suppose that each instruction comprises 4 bytes, and that it is stored in one memory word. Interrupts which are initiated by an instruction are a. Assembly language A uses alphabetic codes in place of binary numbers used in machine language B is the easiest language to write programs C need not be translated into machine language D None of these Ans: A 6. Such hazards are often called control hazards or instruction hazard.

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Smashwords

computer architecture exam questions and answers

What are the capacity of the disk pack and the number of bits required to specify a particular section in the disk? The most well- known input device is the keyboard. This means that the loop is repeated as long as there are entries in the list that are yet to be added to R0. The instructions written in a proper sequence to execute a particular task is called program. Questions 1 to 10 Questions 11 to 20 Questions 21 to 30 Questions 31 to 40 Questions 41 to 50 Questions 51 to 60 Questions 61 to 70 Questions 71 to 80 Questions 81 to 90 Questions 91 to 100 Questions 101 to 110 Questions 111 to 120 Questions 121 to 130 Questions 131 to 140 Questions 141 to 150 Questions 151 to 160 Questions 161 to 170 Questions 171 to 180 Questions 181 to 190 Questions 191 to 200 Questions 201 to 210 Questions 211 to 220 Questions 221 to 230 Questions 231 to 240 Questions 241 to 250 Questions 251 to 260 Questions 261 to 270 Questions 271 to 280 Questions 281 to 290 Questions 291 to 300 Questions 301 to 310 Questions 311 to 320 Questions 321 to 330 Questions 331 to 340 Questions 341 to 350 Questions 351 to 360 Questions 361 to 370 Questions 371 to 380 Questions 381 to 390 Tks very much for your post. Program Register Ans D 179. Processor datapath and control quiz has 21 multiple choice questions.

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Input/Output in Computer Architecture

computer architecture exam questions and answers

Each register can store one word of data. Systems that contain multiple buses achieve more concurrency in operations by allowing two or more transfers to be carried out at the same time. Thus, the one-address instruction iii. The content in this blog is fetched through online and offline research. B is 8 times as fast as A for programs Answers Key: 1.

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200 TOP Computer Organization and Architecture Multiple Choice Questions and Answers Computer Organization and Architecture Multiple Choice Questions

computer architecture exam questions and answers

He is also a peer reviewer of research publications in different journals and conference proceedings. Computer architecture is a specification detailing about how a set of software and hardware standards interacts with each other to form a computer system or platform. At the end of the nth pass through the loop, the Decrement instruction produces a value of zero, and, hence, branching does not occur. In this program out of 109 instructions 20% are instruction of conditional branching. Each register can store one word of data. What is instruction level parallelism? The instructions in the delay slots are always fetched and they are arranged such that they are fully executed whether or not branch is taken. What does system design process include? In both the organization the size of the address is 32 bit.

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Use Our Computer Architecture Exam Questions and Solutions

computer architecture exam questions and answers

Text editors: A text editor is a type of program used for editing plain text files. R2out, Select Y, Add, Zin 3. However, we should point out that other schemes are possible. What is the role of cache memory in pipeline? The information contained in this blog is subject to change without notice. In a single byte how many bits will be there? As execution proceeds, instructions are fetched one by one over the bus into the processor, and a copy is placed in the cache.

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Computer System Architecture

computer architecture exam questions and answers

Request level and data level parallelism quiz has 32 multiple choice questions. To place an order, you just need to mention your requirements and set the deadline. The circuit in Figure 2. To execute a machine instruction, the processor divides the action to be performed into a sequence of basic steps, such that each step can be completed in one clock cycle. What is parallelism in reference to computer architecture? Absolute addressing mode - The operand is in a memory location; the address of this location is given explicitly in the instruction. What is the total time taken to process 1000 data items on this pipeline assuming constant clocking rate? How to Avoid Hazards: 1.

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